Silicon Physical Design Engineer at XMOS
Bristol, GB

Based in our Bristol office, the Physical Design Engineer works in the Chip Development team and plays a pivotal role in developing semiconductor products. Your responsibilities include:

  • Working with the Chip team through the entire lifecycle of chip development
  • Physically implementing blocks and the top level of XMOS chips
  • Focusing on implementation of complex processor-based chips
  • Collaborating with the Frontend team to ensure that chips can be physically implemented, and can meet key requirements for power, performance and area

About XMOS

We’re a global business, headquartered in Bristol, with offices across Asia and the United States; and we’re backed by some of the best names in high tech venture capital.

XMOS stands at the interface between voice processing, biometrics and artificial intelligence. Backed by some of the best names in high tech venture capital, we’re a leading supplier of voice and audio solutions to the consumer electronics market. Today our unique silicon architecture and highly differentiated software delivers class-leading far-field voice capture, and we’re building for a more natural human machine interface tomorrow.

As a deep tech company, we’re always looking for questioning, flexible and determined people to help make that happen. Ours is a learning environment, which means we hire for capability and potential – and help you to achieve your best.

XMOS has ambitious plans for its next generation of ICs and is looking for energetic and versatile design engineers to join the growing team.  Working in a ‘start-up’ environment, you will participate in all aspects of design, working at block and chip level.

Who we’re looking for

You will have a proven track record in the implementation of complex digital ICs, with demonstrable skills in digital ASIC Physical Design, from RTL to GDSII.

Working within the team, you will be primarily involved in physical design tasks including synthesis, constraint generation, floor-planning, prototype layouts, IP integration, and STA.

This role offers an opportunity to develop a broad skillset and be involved in other parts of the chip design lifecycle, such as physical architecture, process evaluation, post fabrication chip bring-up, flow development and test development, amongst others.

The successful candidate should have significant experience in physical design and automated flow creation in low geometries (preferably FinFET). You will have experience in tools such as Synopsys DC, ICC2, PTSI, as well as good scripting skills and a desire to automate tasks. You will have a desire to develop a broad skillset and experience in other areas of chip design.

You’ll have:

  • Excellent skills in Synthesis and constraint generation
  • Clear ability to take designs through all stages of implementation, from floor-planning to signoff
  • Experience of STA
  • Good working knowledge of IP integration
  • A strong orientation towards microprocessor technologies
  • A proven ability in scripting and flow automation methods
  • Good working knowledge of version and change control management

The benefits

  • Competitive Salary.
  • Share Options – EMI approved share options allocated at a level commensurate to seniority. A 4-year vesting profile with a 1-year cliff.
  • Holidays – 25 days paid with an additional 3 days over the Christmas period when the office closes.
  • Private Medical Insurance – membership of the corporate healthcare plan, currently held with AVIVA. Option of adding partner and children if they are residing in the UK (incremental premium has to be paid by the Employee.)
  • Group Income Protection Cover – the level of benefit payable is 75% of Scheme Salary and an employee will become entitled to benefit after being unable to work because of sickness or injury for 26 continuous weeks.
  • Life Insurance – the benefit payable is a lump sum of 4 times Scheme Salary.
  • Salary Sacrifice Pension Scheme – established for employee contributions, with XMOS matching these up to 5% of salary.